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intel-microcode vulnerabilities · Page 5

Vulnerabilities published for intel-microcode in the last 30 days: 0. Listed in the KEV catalogue: 0.

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Vulnerabilities: 100

  1. CVE-2018-12130

    Medium · CVSS 5.9EPSS 1.55%Fix available

    CVE-2018-12130

    Microarchitectural Fill Buffer Data Sampling (MFBDS): Fill buffers on some microprocessors utilizing speculative execution may allow an authenticated user to potentially enable information disclosure via a side channel with local access. A list of impacted products can be found here: https://www.intel.com/content/dam/www/public/us/en/documents/corporate-information/SA00233-microcode-update-guidance_05132019.pdf

    • Update to 3.20190514.1
    Published Updated
  2. CVE-2018-12127

    Medium · CVSS 5.6EPSS 1.5%Fix available

    CVE-2018-12127

    Microarchitectural Load Port Data Sampling (MLPDS): Load ports on some microprocessors utilizing speculative execution may allow an authenticated user to potentially enable information disclosure via a side channel with local access. A list of impacted products can be found here: https://www.intel.com/content/dam/www/public/us/en/documents/corporate-information/SA00233-microcode-update-guidance_05132019.pdf

    • Update to 3.20190514.1
    Published Updated
  3. CVE-2018-12126

    Medium · CVSS 5.6EPSS 1.51%Fix available

    CVE-2018-12126

    Microarchitectural Store Buffer Data Sampling (MSBDS): Store buffers on some microprocessors utilizing speculative execution may allow an authenticated user to potentially enable information disclosure via a side channel with local access. A list of impacted products can be found here: https://www.intel.com/content/dam/www/public/us/en/documents/corporate-information/SA00233-microcode-update-guidance_05132019.pdf

    • Update to 3.20190514.1
    Published Updated
  4. CVE-2019-11091

    Medium · CVSS 5.6EPSS 0.61%Fix available

    CVE-2019-11091

    Microarchitectural Data Sampling Uncacheable Memory (MDSUM): Uncacheable memory on some microprocessors utilizing speculative execution may allow an authenticated user to potentially enable information disclosure via a side channel with local access. A list of impacted products can be found here: https://www.intel.com/content/dam/www/public/us/en/documents/corporate-information/SA00233-microcode-update-guidance_05132019.pdf

    • Update to 3.20190514.1
    Published Updated
  5. CVE-2018-3646

    Medium · CVSS 5.6EPSS 8.1%Fix available

    CVE-2018-3646

    Systems with microprocessors utilizing speculative execution and address translations may allow unauthorized disclosure of information residing in the L1 data cache to an attacker with local user access with guest OS privilege via a terminal page fault and a side-channel analysis.

    • Update to 3.20180703.1
    Published Updated
  6. CVE-2018-3640

    Medium · CVSS 5.6EPSS 7.27%Fix available

    CVE-2018-3640

    Systems with microprocessors utilizing speculative execution and that perform speculative reads of system registers may allow unauthorized disclosure of system parameters to an attacker with local user access via a side-channel analysis, aka Rogue System Register Read (RSRE), Variant 3a.

    • Update to 3.20180703.1
    Published Updated
  7. CVE-2018-3639

    Medium · CVSS 5.5EPSS 60.63%Public exploitFix available

    CVE-2018-3639

    Systems with microprocessors utilizing speculative execution and speculative execution of memory reads before the addresses of all prior memory writes are known may allow unauthorized disclosure of information to an attacker with local user access via a side-channel analysis, aka Speculative Store Bypass (SSB), Variant 4.

    • Update to 3.20180703.1
    Published Updated

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